Texas Instruments MSP430x1xx - Manual (Page 153)

Timer Modes
10-13
Timer_A
10.4 Capture/Compare Blocks
Three or five (depending on device) identical capture/compare blocks (shown
in Figure 10–17) provide flexible control for real-time processing. Any one of
the blocks may be used to capture the timer data at an applied event, or to
generate time intervals. Each time a capture occurs or a time interval is
completed, interrupts can be generated from the applicable capture/compare
register. The mode bit CAPx, in control word CCTLx, selects the compare or
capture operation and the capture mode bits CCMx1 and CCMx0 in control
word CCTLx define the conditions under which the capture function is
performed.
Both the interrupt enable bit CCIEx and the interrupt flag CCIFGx are used for
capture and compare modes. CCIEx enables the corresponding interrupt.
CCIFGx is set on a capture or compare event.
The capture inputs CCIxA and CCIxB are connected to external pins or internal
signals. MSP430x1xx devices may have different signals connected to CCIxA
and CCIxB. The data sheet should always be consulted to determine the
Timer_A connections for a particular device.
Figure 10–17. Capture/Compare Blocks
Capture
Mode
EN
CCISx0 CCISx1
CCIxA
CCIxB
GND
0
1
2
3
V
CC
CCMx1 CCMx0
Capture/Compare Register
CCRx
Set_CCIFGx
0
0
1
1 0
1
0
1 Disabled
Positive Edge
Negative Edge
Both Edges
Logic
Capture
15 0
Comparator x
0
1
CAPx
A
Y
CCIx
SCCIx
Timer Bus
COVx
Overflow x
CAPx
EQUx