Texas Instruments MSP430x1xx User Manual
Page 328
ADC12 Control Registers
15-38
It is important to note that ADC12OVIFG and ADC12TOVIFG are reset auto-
matically when either is the highest pending interrupt and the ADC12IV regis-
ter is accessed. For example, if both are pending simultaneously,
ADC12OVIFG will be reset automatically with the first access of ADC12IV, and
ADC12TOVIFG will be reset automatically with the next access to the
ADC12IV (assuming ADC12OVIFG was not set again). However, flags
ADC12IFG.x must be reset by software or reset by accessing the correspond-
ing conversion-memory register ADC12MEMx.
Also note that the flags ADC12OVIFG and ADC12TOVIFG can not be ac-
cessed by software. They are visible only via the interrupt vector word
ADC12IV data.
Table 15–3.ADC12IV Interrupt-Vector Values
ADC Interrupt Flags ADC12IFG
ADC12TOV
ADC12OV
ADC12IV
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
ADC12TOV
ADC12OV
ADC12IV
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
1
2
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
1
0
4
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
1
0
0
6
x
x
x
x
x
x
x
x
x
x
x
x
x
x
1
0
0
0
8
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
x
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
34
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
36
Note:
Writing to Read Only Register ADC12IV
When a write to vector word register ADC12IV occurs, the highest-pending
interrupt flag is reset. Therefore, the interrupt event is missed.