Figure 11–7. new period > old period – Texas Instruments MSP430x1xx User Manual

Page 185

Advertising
background image

Timer Modes

11-9

Timer_B

11.3.2.1 Timer in Up Mode—Changing the Period Register TBCL0 Value,

Immediate Mode for TBCL0

Changing the timer period register TBCL0 while the timer is running and when
the transfer mode from CCR0 is

immediate can be a little tricky. When the new

period is greater than or equal to the old period, the timer simply counts up to
the new period and no special attention is required (see Figure 11–7).
However, when the new period is less than the old period, the phase of the
timer clock during the TBCL0 update affects how the timer reacts to the new
period.

If the new, smaller period is transferred from CCR0 to TBCL0 during a high
phase of the timer clock, then the timer rolls to zero (or begins counting down
when in the up/down mode) on the next rising edge of the timer clock.
However, if the new, smaller period is written during a low phase of the timer
clock, then the timer continues to increment with the old period for one more
clock cycle before adopting the new period and rolling to zero (or beginning
counting down). This is shown in Figure 11–8.

Note:

If TBCL0 > TBR

(max),

the counter rolls to zero with the next rising edge of

timer clock.

Figure 11–7. New Period > Old Period

2

0

ПППП

ПППП

0

1

1

2

3

0

1

2

3

0

1

2

3

TBCL0old = 2
TBCL0new = 3

3

2

1

0

TBCL0

Timer

Register

Advertising