Texas Instruments MSP430x1xx - Manual (Page 129)

Ports P3, P4, P5, P6
8-9
Digital I/O Configuration
8.3 Ports P3, P4, P5, P6
General-purpose ports P3–P6 function as shown in Figure 8–3. Each pin can
be selected to operate with the I/O port function, or to be used with a different
peripheral module. This multiplexing of pins allows for a reduced pin count on
MSP430 devices.
Four registers control each of the ports (see Section 8.3.1).
Ports P3–P6 are connected to the processor core through the 8-bit MDB and
the MAB. They should be accessed with byte instructions using the absolute
address mode.
Figure 8–3. Ports P3–P6 Configuration
Input Register PnIN
Output Register PnOUT
Direction Register
PnDIR
Function Select
Register PnSEL
8
8
R
R/W
8
8
R/W
R/W
MDB
MSB
Pn.7
LSB
Pn.0
n = 3: 019h
n = 4: 01Dh
n = 5: 031h
n = 6: 035h
n = 3: 01Ah
n = 4: 01Eh
n = 5: 032h
n = 6: 036h
n = 3: 01Bh
n = 4: 01Fh
n = 5: 033h
n = 6: 037h
n = 3: 018h
n = 4: 01Ch
n = 5: 030h
n = 6: 034h
8.3.1 Port P3–P6 Control Registers
The four control registers of each port give maximum configuration flexibility
of digital I/O.
- All individual I/O bits are programmed independently
- Any combination of input is possible
- Any combination of port or module function is possible
The four registers for each port are shown in Table 8–3. They each contain
eight bits and should be accessed with byte instructions.