Texas Instruments MSP430x1xx - Manual (Page 242)

Baud Rate Considerations
12-26
Figure 12–27. MSP430 Transmit Bit Timing
0 1 2 3 4 5 6 7 8 9 10 11 12
t
0
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
9
t
10
t
11
t
12
i
t
i
ST D0 D6 D7
Mark
Space
[2nd Stop Bit, SP = 1]
[Address Bit, MM = 1]
[Parity Bit, PE = 1]
[8th Data Bit, Char = 1]
BRCLK
URXD
Figure 12–28. MSP430 Transmit Bit Timing Errors
0 1 8 9 10 11
t
0
t
1
t
8
t
9
t
10
t
11
t
0
t
1
t
8
t
9
t
10
t
11
ST D0 D7 PA
i
t
target
t
error
t
actual
URXD
Mark
Space
Even small errors per bit (relative errors) can result in large cumulative errors.
They must be considered to be cumulative, not relative. The error of an
individual bit can be calculated by:
Error[%] +
S
n–1
i + 0
t
actual
i
* S
n–1
i + 0
t
target
i
t
baud rate
100%
or,
Error [%] +
NJ
baud rate
BRCLK
ƪ
(i ) 1) UBR ) S
n–1
i + 0
m
i
ƫ
* (i ) 1)
Nj
100%
With:
baud rate: Required baud rate
BRCLK:
Input frequency – selected for UCLK, ACLK, or SMCLK
i = 0 for the start bit, 1 for the data bit D0, and so on
UBR: Division factor in registers UBR1 and UBR0