Texas Instruments MSP430x1xx - Manual (Page 202)

11-26
Table 11–3. State of OUTx at Next Rising Edge of Timer Clock
Mode EQU0 EQUx D
0 x x x(OUTx bit)
1 x
x 0
1 OUTx (no change)
1 (set)
2 0
0
1
1 0
1
0
1 OUTx (no change)
OUTx (toggle)
0 (reset)
1 (set)
3 0
0
1
1 0
1
0
1 OUTx (no change)
1 (set)
0 (reset)
1 (set)
4 x
x 0
1 OUTx (no change)
OUTx (toggle)
5 x
x 0
1 OUTx (no change)
0 (reset)
6 0
0
1
1 0
1
0
1 OUTx (no change)
OUTx (toggle)
1 (set)
0 (reset)
7 0
0
1
1 0
1
0
1 OUTx (no change)
0 (reset)
1 (set)
0 (reset)
11.5.3 Output Examples
The following are some examples of possible output signals using the various
timer and output modes.
11.5.3.1 Output Examples—Timer in Up Mode
The OUTx signal is changed when the timer counts up to the TBCLx value, and
rolls from TBCL0 to zero, depending on the output mode, as shown in
Figure 11–24.