Texas Instruments MSP430x1xx - Manual (Page 60)

RAM and Peripheral Organization
4-8
Note: Word-Byte Operations
Word-byte or byte-word operations on memory data are not supported. Each
register-byte or byte-register is performed as a byte operation.
4.4.2 Peripheral Modules—Address Allocation
Some peripheral modules are accessible only with byte instructions, while
others are accessible only with word instructions. The address space from
0100 to 01FFh is reserved for word modules, and the address space from 00h
to 0FFh is reserved for byte modules.
Peripheral modules that are mapped into the word address space must be
accessed using word instructions (for example, MOV R5,&WDTCTL).
Peripheral modules that are mapped into the byte address space must be
accessed with byte instructions (MOV.B #1,&P1OUT).
The addressing of both is through the absolute addressing mode or the 16-bit
working registers using the indexed, indirect, or indirect autoincrement
addressing mode. See Figure 4–7 for the RAM/peripheral organization.
Figure 4–7. Example of RAM/Peripheral Organization
Address
(Hex.)
16-Bit Peripheral Modules
8-Bit Peripheral Modules
Special Function Registers
7 0
01FFh
0100h
0FFh
010h
0Fh
0h
Function
Timer,
ADC, . . .
I/O, USART
Comparator_A, . . .
SFR
Access
Word
Byte
Byte
4.4.2.1 Word Modules
Word modules are peripherals that are connected to the 16-bit MDB.
Word modules can be accessed with word or byte instructions. If byte
instructions are used, only even addresses are permissible, and the high byte
of the result is always ’0’.
The peripheral file address space is organized into sixteen frames with each
frame representing eight words as described in Table 4–1.