Texas Instruments MSP430x1xx - Manual (Page 216)

Timer_B Registers
11-40
The software overhead for different interrupt sources includes interrupt
latency and return-from-interrupt cycles (but not the task handling itself), as
described:
- Capture/compare block CCR0 11 cycles
- Capture/compare blocks CCR1 to CCR6 16 cycles
- Timer overflow TBIFG 14 cycles
11.6.4.5 Timing Limits
With the TBIV register and the previous software, the shortest repetitive time
distance t
CRmin
between two events using a compare register is:
t
CRmin
= t
taskmax
+ 16
×
t
cycle
With: t
taskmax
Maximum (worst case) time to perform the task during the
interrupt routine (for example, incrementing a counter)
t
cycle
Cycle time of the system frequency MCLK
The shortest repetitive time distance t
CLmin
between two events using a
capture register is:
t
CLmin
= t
taskmax
+ 16 x t
cycle