Texas Instruments MSP430x1xx User Manual
Page 50
Operating Modes
3-20
Figure 3–11. Typical Current Consumption of 13x and 14x Devices vs. Operating Modes
315
AM
340
270
225
180
135
90
45
0
LPM0
LPM2
LPM3
LPM4
225
70
65
17 11
2
1
0.1 0.1
V
CC
= 3 V
V
CC
= 2.2 V
Operating Modes
A
µ
ICC/
The low-power modes 1–4 enable or disable the CPU and the clocks. In
addition to the CPU and clocks, enabling or disabling specific peripherals may
further reduce total current consumption of the individual modes. The activity
state of each peripheral is controlled by the control registers for the individual
peripherals. In addition, the SFRs include module enable bits that may be used
to enable or disable the operation of specific peripheral modules (see
Table 3–4).
3.5.1
Low
-
Power Mode 0 and 1 (LPM0 and LPM1)
Low power mode 0 or 1 is selected if bit CPUOff in the status register is set.
Immediately after the bit is set the CPU stops operation, and the normal
operation of the system core stops. The operation of the CPU halts and all
internal bus activities stop until an interrupt request or reset occurs. The
system clock generator continues operation, and the clock signals MCLK,
SMCLK, and ACLK stay active depending on the state of the other three status
register bits, SCG0, SCG1, and OscOff.
The peripherals are enabled or disabled with their individual control register
settings, and with the module enable registers in the SFRs. All I/O port pins
and RAM/registers are unchanged. Wake up is possible through all enabled
interrupts.
The following are examples of entering and exiting LPM0. The method shown
is applicable to all low-power modes.
The following example describes entering into low-power mode 0.
;===Main program flow with switch to CPUOff Mode==============
;
BIS #18h,SR
;Enter LPM0 + enable general interrupt GIE
;(CPUOff=1, GIE=1). The PC is incremented
;during execution of this instruction and
;points to the consecutive program step.
......
;The program continues here if the CPUOff
;bit is reset during the interrupt service
;routine. Otherwise, the PC retains its
;value and the processor returns to LPM0.