Altera Arria 10 Avalon-MM - Manual (Page 148)

CvP has the following advantages:
• Provides a simpler software model for configuration. A smart host can use the PCIe protocol and the
application topology to initialize and update the FPGA fabric.
• Enables dynamic core updates without requiring a system power down.
• Improves security for the proprietary core bitstream.
• Reduces system costs by reducing the size of the flash device to store the .pof.
• Facilitates hardware acceleration.
• May reduce system size because a single CvP link can be used to configure multiple FPGAs.
Related Information
Configuration via Protocol (CvP) Implementation in Altera FPGAs User Guide
ECRC
ECRC ensures end-to-end data integrity for systems that require high reliability. You can specify this
option under the Error Reporting heading. The ECRC function includes the ability to check and generate
ECRC. In addition, the ECRC function can forward the TLP with ECRC to the RX port of the Application
Layer. When using ECRC forwarding mode, the ECRC check and generation are performed in the
Application Layer.
You must turn on Advanced error reporting (AER), ECRC checking, and ECRC generation under the
PCI Express/PCI Capabilities heading using the parameter editor to enable this functionality.
For more information about error handling, refer to Error Signaling and Logging in Section 6.2 of the PCI
Express Base Specification.
Related Information
PCI Express Base Specification 3.0
ECRC on the RX Path
When the ECRC generation option is turned on, errors are detected when receiving TLPs with a bad
ECRC. If the ECRC generation option is turned off, no error detection occurs. If the ECRC forwarding
option is turned on, the ECRC value is forwarded to the Application Layer with the TLP. If the ECRC
forwarding option is turned off, the ECRC value is not forwarded.
13-2 ECRC
UG-01145_avmm
2015.05.14
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