Altera Arria 10 Avalon-MM - Manual (Page 180)

Location altpcietb_bfm_driver_rp.v
Arguments
bar_table Address of the Endpoint
bar_table
structure in BFM shared
memory. This routine populates the
bar_table
structure. The
bar_table
structure stores the size of each BAR and the
address values assigned to each BAR. The address of the
bar_
table
structure is passed to all subsequent read and write
procedure calls that access an offset from a particular BAR.
ep_bus_num PCI Express bus number of the target device. This number can
be any value greater than 0. The Root Port uses this as its
secondary bus number.
ep_dev_num PCI Express device number of the target device. This number
can be any value. The Endpoint is automatically assigned this
value when it receives its first configuration transaction.
rp_max_rd_req_size Maximum read request size in bytes for reads issued by the
Root Port. This parameter must be set to the maximum value
supported by the Endpoint Application Layer. If the Applica‐
tion Layer only supports reads of the
MAXIMUM_PAYLOAD_SIZE
,
then this can be set to 0 and the read request size will be set to
the maximum payload size. Valid values for this argument are
0, 128, 256, 512, 1,024, 2,048 and 4,096.
display_ep_config When set to 1 many of the Endpoint Configuration Space
registers are displayed after they have been initialized, causing
some additional reads of registers that are not normally
accessed during the configuration process such as the Device
ID and Vendor ID.
addr_map_4GB_limit When set to 1 the address map of the simulation system will be
limited to 4 GBytes. Any 64-bit BARs will be assigned below
the 4 GByte limit.
ebfm_cfg_decode_bar Procedure
The
ebfm_cfg_decode_bar
procedure analyzes the information in the BAR table for the specified BAR
and returns details about the BAR attributes.
Location altpcietb_bfm_driver_rp.v
Syntax
ebfm_cfg_decode_bar(bar_table, bar_num, log2_size, is_mem, is_pref, is_64b)
14-30 ebfm_cfg_decode_bar Procedure
UG-01145_avmm
2015.05.14
Altera Corporation Avalon-MM Testbench and Design Example
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