Altera Arria 10 Avalon-MM - Manual (Page 2)

Contents
Datasheet............................................................................................................. 1-1
Arria 10 Avalon-MM Interface for PCIe Datasheet ...............................................................................1-1
Features ........................................................................................................................................................ 1-2
Release Information ....................................................................................................................................1-6
Device Family Support ...............................................................................................................................1-7
Configurations .............................................................................................................................................1-7
Example Designs..........................................................................................................................................1-9
Debug Features ..........................................................................................................................................1-10
IP Core Verification ..................................................................................................................................1-10
Compatibility Testing Environment .......................................................................................... 1-10
Performance and Resource Utilization ..................................................................................................1-10
Recommended Speed Grades ..................................................................................................................1-11
Steps in Creating a Design for PCI Express........................................................................................... 1-11
Getting Started with the Avalon-MM Arria 10 Hard IP for PCI Express .........2-1
Running Qsys .............................................................................................................................................. 2-2
Generating the Example Design ............................................................................................................... 2-3
Understanding Simulation Log File Generation..................................................................................... 2-5
Running a Gate-Level Simulation..............................................................................................................2-5
Simulating the Single DWord Design ......................................................................................................2-5
Generating Quartus II Synthesis Files.......................................................................................................2-6
Creating a Quartus II Project .................................................................................................................... 2-6
Adding Virtual Pin Assignment to the Quartus II Settings File (.qsf)................................................. 2-7
Compiling the Design .................................................................................................................................2-7
Programming a Device ...............................................................................................................................2-7
Understanding Channel Placement Guidelines ..................................................................................... 2-7
Parameter Settings.............................................................................................. 3-1
Arria 10 Avalon-MM System Settings ..................................................................................................... 3-1
Interface System Settings ........................................................................................................................... 3-4
Base Address Register (BAR) Settings ......................................................................................................3-6
Device Identification Registers ..................................................................................................................3-7
PCI Express and PCI Capabilities Parameters ........................................................................................3-8
Device Capabilities ..........................................................................................................................3-8
Error Reporting ............................................................................................................................... 3-9
Link Capabilities ........................................................................................................................... 3-10
MSI and MSI-X Capabilities ........................................................................................................3-11
Slot Capabilities .............................................................................................................................3-12
Power Management ......................................................................................................................3-13
TOC-2
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