Device identification registers, Device identification registers -7 – Altera Arria 10 Avalon-MM User Manual
Page 33
Device Identification Registers
Table 3-4: Device ID Registers
The following table lists the default values of the read-only Device ID registers. You can use the parameter editor
to change the values of these registers. Refer to Type 0 Configuration Space Registers for the layout of the Device
Identification registers.
Register Name
Range
Default Value
Description
Vendor ID
16 bits
0x00000000
Sets the read-only value of the
Vendor ID
register. This
parameter cannot be set to 0xFFFF, per the PCI Express
Specification.
Address offset: 0x000.
Device ID
16 bits
0x00000000
Sets the read-only value of the
Device ID
register. This
register is only valid in the Type 0 (Endpoint) Configu‐
ration Space.
Address offset: 0x000.
Revision ID
8 bits
0x00000000
Sets the read-only value of the
Revision ID
register.
Address offset: 0x008.
Class code
24 bits
0x00000000
Sets the read-only value of the
Class Code
register.
Address offset: 0x008.
Subsystem
Vendor ID
16 bits
0x00000000
Sets the read-only value of the
Subsystem Vendor ID
register in the PCI Type 0 Configuration Space. This
parameter cannot be set to 0xFFFF per the PCI Express
Base Specification. This value is assigned by PCI-SIG to
the device manufacturer. This register is only valid in
the Type 0 (Endpoint) Configuration Space.
Address offset: 0x02C.
Subsystem
Device ID
16 bits
0x00000000
Sets the read-only value of the
Subsystem Device ID
register in the PCI Type 0 Configuration Space.
Address offset: 0x02C
Related Information
UG-01145_avmm
2015.05.14
Device Identification Registers
3-7
Parameter Settings
Altera Corporation