Altera Arria 10 Avalon-MM - Manual (Page 65)

Signal Direction Description
eidleinfersel0[2:0] Output Electrical idle entry inference mechanism selection. The
following encodings are defined:
• 3'b0xx: Electrical Idle Inference not required in current
LTSSM state
• 3'b100: Absence of COM/SKP Ordered Set in the 128 us
window for Gen1 or Gen2
• 3'b101: Absence of TS1/TS2 Ordered Set in a 1280 UI interval
for Gen1 or Gen2
• 3'b110: Absence of Electrical Idle Exit in 2000 UI interval for
Gen1 and 16000 UI interval for Gen2
• 3'b111: Absence of Electrical idle exit in 128 us window for
Gen1
Notes:
1. These signals are for simulation only. For Quartus II software compilation, these pipe signals can be
left floating.
5-18 PIPE Interface Signals
UG-01145_avmm
2015.05.14
Altera Corporation 64- or 128-Bit Avalon-MM Interface to the Application Layer
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