Base address register (bar) settings, Base address register (bar) settings -6 – Altera Arria 10 Avalon-MM User Manual

Page 32

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Parameter

Value

Description

Size of address pages

4 KByte–4GByte Sets the size of the PCI Express system pages. All pages

must be the same size. This parameter is only necessary

for 32-bit addresses.

Related Information

coreclkout_hip

on page 7-5

Base Address Register (BAR) Settings

You can configure up to six 32-bit BARs or three 64-bit BARs.

Table 3-3: BAR Registers

Parameter

Value

Description

Type

Disabled

64-bit prefetchable memory

32-bit non-prefetchable memory

32-bit prefetchable memory

I/O address space

Defining memory as prefetchable allows data in the

region to be fetched ahead anticipating that the

requestor may require more data from the same

region than was originally requested. If you specify

that a memory is prefetchable, it must have the

following 2 attributes:
• Reads do not have side effects

• Write merging is allowed
The 32-bit prefetchable memory and I/O address

space BARs are only available for the Legacy

Endpoint.

Size

Not configurable

Specifies the memory size calculated from other

parameters you enter.

3-6

Base Address Register (BAR) Settings

UG-01145_avmm

2015.05.14

Altera Corporation

Parameter Settings

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