Avalon-mm testbench and design example, Avalon-mm testbench and design example -1 – Altera Arria 10 Avalon-MM User Manual
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Avalon-MM Testbench and Design Example
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This chapter introduces the Root Port or Endpoint design example including a testbench, BFM, and a test
driver module. You can create this design example for using design flows described in Getting Started with
the Arria 10 Hard IP for PCI Express .
When configured as an Endpoint variation, the testbench instantiates a design example and a Root Port
BFM, which provides the following functions:
• A configuration routine that sets up all the basic configuration registers in the Endpoint. This configu‐
ration allows the Endpoint application to be the target and initiator of PCI Express transactions.
• A Verilog HDL procedure interface to initiate PCI Express transactions to the Endpoint.
The testbench uses a test driver module, altera_avalon_dma to exercise the DMA of the design example.
The test driver module displays information from the Endpoint Configuration Space registers, so that you
can correlate to the parameters you specified using the parameter editor.
When configured as a Root Port, the testbench instantiates a Root Port design example and an Endpoint
model, which provides the following functions:
• A configuration routine that sets up all the basic configuration registers in the Root Port and the
Endpoint BFM. This configuration allows the Endpoint application to be the target and initiator of
PCI Express transactions.
• A Verilog HDL procedure interface to initiate PCI Express transactions to the Endpoint BFM.
The testbench uses a test driver module, altpcietb_bfm_driver_avmm, to exercise the target memory and
DMA channel in the Endpoint BFM. The test driver module displays information from the Root Port
Configuration Space registers, so that you can correlate to the parameters you specified using the
parameter editor. The Endpoint model consists of an Endpoint variation combined with the DMA
application described above.
Note: The Altera testbench and Root Port or Endpoint BFM provide a simple method to do basic testing
of the Application Layer logic that interfaces to the variation. However, the testbench and Root
Port BFM are not intended to be a substitute for a full verification environment. To thoroughly test
your application, Altera suggests that you obtain commercially available PCI Express verification
IP and tools, or do your own extensive hardware testing or both.
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