Freescale Semiconductor MCF5480 User Manual

Page 1017

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MCF548x Reference Manual, Rev. 3

Freescale Semiconductor

Index-3

port interrupt enable (EPIER) 14-4

Error counters 21-30
Ethernet

address recognition 30-48
collision handling 30-53
errors

handling 30-54
reception

CRC 30-55
frame length 30-55
non-octet 30-55
overrun 30-55
truncation 30-55

transmission

attempts limit expired 30-54
heartbeat 30-54
late collision 30-54
underrun 30-54

frame reception 30-47
frame transmission 30-46
hash table 30-49
initialization 30-43
interpacket gap time 30-53
memory map

control and stauts registers 30-7
MIB block counters 30-8

operation

10/100 Mbps MII 30-3, 30-46
7-wire serial 30-4, 30-46
full duplex 30-3, 30-52
half duplex 30-3
loopback 30-53

registers

control (ECR) 30-13
descriptor group lower address (GALR) 30-24
descriptor individual lower (IALR) 30-23
descriptor individual upper (IAUR) 30-22
FEC transmit FIFO watermark (FECTFWR) 30-25
interrupt event (EIR) 30-10
interrupt mask (EIMR) 30-12
MIB control (MIBC) 30-17
MII management frame (MMFR) 30-14
MII speed control (MSCR) 30-15
opcode/pause duration (OPD) 30-22
physical address low (PALR) 30-20
receive control (RCR) 30-17
transmit control (TCR) 30-19

Exceptions

FPU 6-17–6-23
overview 3-36
precise faults 3-42
processor 3-39

stack frame definition 3-38

F
FEC, see Ethernet
FlexBus

address latch 17-2
burst cycles 17-26–??
byte lanes 17-2
chip select operation 17-6
connections 17-12
data alignment 17-12
data transfer 17-12

cycle states 17-14
read cycle 17-15
write cycle 17-16

errors 17-32
misaligned operands 17-31
registers

chip select address (CSARn) 17-8
chip select control (CSCRn) 17-10
chip select mask (CSMRn) 17-9

signals

address/data (ADn) 17-4
byte selects (BE/BWEn) 17-5
chip select (FBCSn) 17-4
output enable (OE) 17-5
read/write (R/W) 17-4
transfer acknowledge (TA) 17-5
transfer burst (TBST) 17-4
transfer size (TSIZn) 17-4
transfer start (TS) 17-4

FlexCAN

bit timing 21-28
error counters 21-30
initialization 21-31
interrupts 21-31
memory map 21-5
message buffers

frames

overload 21-28
remote 21-27
self-received 21-25

handling 21-25

locking and releasing 21-27
receive deactivation 21-26
serial message buffers 21-26
transmit deactivation 21-26

receive

codes 21-21
error status flag (RXWARN) 21-17

serial 21-24
status 21-17

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