Altera Arria V Hard IP for PCI Express - Manual (Page 100)

7–2 Chapter 7: IP Core Interfaces
Arria V Hard IP for PCI Express December 2013 Altera Corporation
User Guide
1
When you are parameterizing your IP core, you can use the Show signals option in
the Block Diagram to see how changing the parameterization changes the top-level
signals.
Figure 7–1 illustrates this option.
Completion “Completion Side Band Signals” on page 7–28
Power management “Power Management Signals” on page 7–40
Physical and Test
Transceiver control “Transceiver Reconfiguration” on page 7–47
Serial “Serial Interface Signals” on page 7–47
PIPE (1) “PIPE Interface Signals” on page 7–51
Test “Test Signals” on page 7–55
Note to Table 7–1 :
(1) Provided for simulation only
Table 7–1. Signal Groups in the Arria V Hard IP for PCI Express (Part 2 of 2)
Signal Group Description
Figure 7–1. Show Signal Option for the Block Diagram