Altera Arria V Hard IP for PCI Express - Manual (Page 67)

Chapter 5: Parameter Settings for the Avalon-MM Arria V Hard IP for PCI Express 5–3
Device Identification Registers
December 2013 Altera Corporation Arria V Hard IP for PCI Express
User Guide
Device Identification Registers
Table 5–3 lists the default values of the read-only Device ID registers. You can edit
these values in the GUI. At run time, you can change the values of these registers
using the reconfiguration block signals. For more information, refer to
“R**Hard IP
Reconfiguration Interface ###if_hip_reconfig###” on page 8–52 .
PCI Express/PCI Capabilities
The PCI Express/PCI Capabilities tab includes the following capabilities:
■ “Device” on page 5–4
■ “Error Reporting” on page 5–5
■ “Link” on page 5–5
■ “Power Management” on page 5–8
Table 5–3. Device ID Registers for Function <n>
Register Name/
Offset Address
Range
Default
Value
Description
Vendor ID
0x000
16 bits 0x00000000
Sets the read-only value of the Vendor ID register. This parameter can
not be set to 0xFFFF per the PCI Express Specification.
Device ID
0x000
16 bits 0x00000001 Sets the read-only value of the Device ID register.
Revision ID
0x008
8 bits 0x00000001 Sets the read-only value of the Revision ID register.
Class code
0x008
24 bits 0x00000000 Sets the read-only value of the Class Code register.
Subsystem
Vendor ID
0x02C
16 bits 0x00000000
Sets the read-only value of the Subsystem Vendor ID register. This
parameter cannot be set to 0xFFFF per the PCI Express Base
Specification 2.1 . This register is available only for Endpoint designs
which require the use of the Type 0 PCI Configuration register.
Subsystem
Device ID
0x02C
16 bits 0x0000000
Sets the read-only value of the Subsystem Device ID register. This
register is only available for Endpoint designs, which require the use of
the Type 0 PCI Configuration Space.