Altera Arria V Hard IP for PCI Express - Manual (Page 70)

5–6 Chapter 5: Parameter Settings for the Avalon-MM Arria V Hard IP for PCI Express
PCI Express/PCI Capabilities
Arria V Hard IP for PCI Express December 2013 Altera Corporation
User Guide
MSI
Table 5–7 describes the MSI Capabilities register parameters.
Table 5–7. MSI and MSI-X Capabilities – 0x05C ,
Parameter Value Description
MSI messages
requested 1, 2, 4,
8, 16
Specifies the number of messages the Application Layer can request. Sets the
value of the
Multiple Message Capable field of the Message Control
register, 0x050[31:16].