Altera Arria V Hard IP for PCI Express - Manual (Page 46)

3–12 Chapter 3: Getting Started with the Avalon-MM Arria Hard IP for PCI Express
Simulating the Example Design
Arria V Hard IP for PCI Express December 2013 Altera Corporation
User Guide
f For more information about IP functional simulation models, refer to Simulating Altera
Designs in volume 3 of the Quartus II Handbook.
Complete the following steps to run the Qsys testbench:
1. In a terminal window, change to the <project_dir>/ ep_g1x4/testbench/mentor
directory.
2. Start the ModelSim simulator.
3. To run the simulation, type the following commands in a terminal window:
a. do msim_setup.tcl
r
b. ld_debug
r (The -debug argument stops optimizations, improving visibility
in the ModelSim waveforms.)
c. run 140000 ns
r
The driver performs the following transactions with status of the transactions
displayed in the ModelSim simulation message window:
■ Various configuration accesses to the Avalon-MM Arria Hard IP for PCI Express
in your system after the link is initialized
■ Setup of the Address Translation Table for requests that are coming from the DMA
component
■ Setup of the DMA controller to read 512 Bytes of data from the Transaction Layer
Direct BFM’s shared memory