Altera Embedded Peripherals IP - Manual (Page 199)

The list below describes how the error signals in the SG-DMA core are implemented in the folowing
configurations:
• Memory-to-memory configuration
No error signals are generated. The error field in the register and descriptor is hardcoded to 0.
• Memory-to-stream configuration
If you specified the usage of error bits in the core, the error bits are generated in the Avalon-ST source
interface. These error bits are hardcoded to 0 and generated in compliance with the Avalon-ST slave
interfaces.
• Stream-to-memory configuration
If you specified the usage of error bits in the core, error bits are generated in the Avalon-ST sink
interface. These error bits are passed from the Avalon-ST sink interface and stored in the registers and
descriptor.
The table below lists the error signals when the core is operating in the memory-to-stream configura‐
tion and connected to the transmit FIFO interface of the Altera Triple-Speed Ethernet MegaCore ®
function.
Table 21-3: Avalon-ST Transmit Error Types
Signal Type Description
TSE_transmit_
error[0]
Transmit Frame Error. Asserted to indicate that the
transmitted frame should be viewed as invalid by the
Ethernet MAC. The frame is then transferred onto the
GMII interface with an error code during the frame
transfer.
The table below lists the error signals when the core is operating in the stream-to-memory configura‐
tion and connected to the transmit FIFO interface of the Triple-Speed Ethernet MegaCore function.
Table 21-4: Avalon-ST Receive Error Types
Signal Type Description
TSE_receive_
error[0]
Receive Frame Error. This signal indicates that an error
has occurred. It is the logical
OR
of receive errors 1
through 5.
TSE_receive_
error[1]
Invalid Length Error. Asserted when the received frame
has an invalid length as defined by the IEEE 802.3
standard.
TSE_receive_
error[2]
CRC Error. Asserted when the frame has been received
with a CRC-32 error.
TSE_receive_
error[3]
Receive Frame Truncated. Asserted when the received
frame has been truncated due to receive FIFO overflow.
TSE_receive_
error[4]
Received Frame corrupted due to PHY error. (The PHY
has asserted an error on the receive GMII interface.)
TSE_receive_
error[5]
Collision Error. Asserted when the frame was received
with a collision.
Each streaming core has a different set of error codes. Refer to the respective user guides for the codes.
21-8 Error Conditions
UG-01085
2014.24.07
Altera Corporation Scatter-Gather DMA Controller Core
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