Altera Embedded Peripherals IP - Manual (Page 288)

Descrip‐
tion:
Enables interrupt preemption (nesting) if a higher priority
interrupt is asserted while a lower priority ISR is executing, for
all interrupts that target the specified register set number.
When this setting is enabled (set to 1), the vector table for each
VIC utilizes a special interrupt funnel that manages preemption.
All interrupts on all VIC instances assigned to that register set
then use this funnel.
When a higher priority interrupt preempts a lower priority
interrupt running in the same register set, the interrupt funnel
detects this condition and saves the processor registers to the
stack before calling the higher priority ISR. The funnel code
restores registers and allows the lower priority ISR to continue
running once the higher priority ISR completes.
Because this funnel contains additional overhead, enabling this
setting increases interrupt response time substantially for all
interrupts that target a register set where this type of preemption
is enabled.
Use this setting if you must guarantee that a higher priority
interrupt preempts a lower priority interrupt, and you assigned
multiple interrupts at different priorities to the same Nios II
shadow register set.
Occurs: Per register set; <n> refers to the register set number.
altera_vic_driver.linker_section
Identifier: ALTERA_VIC_DRIVER_LINKER_SECTION
Type:
UnquotedString
Default
value:
.text
Destina‐
tion file:
system.h
UG-01085
2014.24.07
altera_vic_driver.linker_section 28-19
Vectored Interrupt Controller Core Altera Corporation
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