Altera Embedded Peripherals IP - Manual (Page 224)

Byte Lanes
0xC Control[31:0]
Table 22-2: Extended Descriptor Format
Byte Lanes
Offset 3 2 1 0
0x0 Read Address[31:0]
0x4 Write Address[31:0]
0x8 Length[31:0]
0xC Write Burst
Count[7:0]
Read Burst
Count [7:0]
Sequence Number[15:0]
0x10 Write Stride[15:0] Read Stride[15:0]
0x14 Read Address[63:32]
0x18 Write Address[63:32]
0x1C Control[31:0]
All descriptor fields are aligned on byte boundaries and span multiple bytes when necessary. Each byte
lane of the descriptor slave port can be accessed independently of the others allowing you to populate the
descriptor using any access size.
Note: The location of the control field is dependent on the descriptor format used. The last bit of the
control field commits the descriptor to the dispatcher buffer when it is asserted. As a result the
control field is always located at the end of a descriptor to allow the host to write the descriptor
sequentially to the dispatcher block.
Read and Write Address Fields
The read and write address fields correspond to the source and destination address for each buffer
transfer. Depending on the transfer type, the read or write address does not need to be provided. When
performing memory-mapped to streaming transfers the write address should not be written as there is no
destination address since the data is being transfer to a streaming port. Likewise, when performing
streaming to memory-mapped transfers the read address should not be written as the data source is a
streaming port.
If a read or write address descriptor is written in a configuration that does not require it, the mSGDMA
ignores the unnecessary address. If a standard descriptor is used and an attempt to write a 64-bit address
is made, the upper 32-bits are lost and can cause the hardware to alias a lower address space. 64-bit
addressing requires the use of the extended descriptor format.
Length Field
The length field is used to specify the number of bytes to transfer per descriptor. The length field is also
used for streaming to memory-mapped packet transfers to limit the number of bytes that can be
transferred before the end-of-packet (EOP) arrives. As a result you must always program the length field.
If you do not wish to limit packet based transfers in the case of Avalon-ST to Avalon-MM transfers,
22-8 Read and Write Address Fields
UG-01085
2014.24.07
Altera Corporation Altera Modular Scatter-Gather DMA
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