Altera Embedded Peripherals IP - Manual (Page 281)

•
altera_vic_regs.h
—Defines the core’s register map, providing symbolic constants to access the low-level
hardware.
• altera_vic_funnel.h , altera_vic_irq.h , altera_vic_irq.h , altera_vic_irq_init.h —Define the prototypes and
macros necessary for the VIC driver.
• altera_vic.c , altera_vic_irq_init.c , altera_vic_isr_register.c , altera_vic_sw_intr.c , altera_vic_set_level.c ,
altera_vic_funnel_non_preemptive_nmi.S, altera_vic_funnel_non_preemptive.S, and
altera_vic_funnel_preemptive.S—Provide the code that implements the VIC driver.
• altera_<name>_vector_tbl.S—Provides a vector table file for each VIC in the system. The BSP
generator creates these files.
Macros
Macros to access all of the registers are defined in altera_vic_regs.h. For example, this file includes
macros to access the
INT_CONFIG
register, including the following macros:
#define IOADDR_ALTERA_VIC_INT_CONFIG(base, irq) __IO_CALC_ADDRESS_NATIVE(base,
irq)
#define IORD_ALTERA_VIC_INT_CONFIG(base, irq) IORD(base, irq)
#define IOWR_ALTERA_VIC_INT_CONFIG(base, irq, data) IOWR(base, irq, data)
#define ALTERA_VIC_INT_CONFIG_RIL_MSK (0x3f)
#define ALTERA_VIC_INT_CONFIG_RIL_OFST (0)
#define ALTERA_VIC_INT_CONFIG_RNMI_MSK (0x40)
#define ALTERA_VIC_INT_CONFIG_RNMI_OFST (6)
#define ALTERA_VIC_INT_CONFIG_RRS_MSK (0x1f80)
#define ALTERA_VIC_INT_CONFIG_RRS_OFST (7)
For a complete list of predefined macros and utilities to access the VIC hardware, refer to the following
files:
• <install_dir>\ip\altera\altera_vectored_interrupt_controller\top\inc\altera_vic_regs.h
• <install_dir>\ip\altera\altera_vectored_interrupt_controller\top\HAL\inc\altera_vic_funnel.h
• <install_dir>\ip\altera\altera_vectored_interrupt_controller\top\HAL\inc\altera_vic_irq.h
28-12 Macros
UG-01085
2014.24.07
Altera Corporation Vectored Interrupt Controller Core
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