Altera Embedded Peripherals IP - Manual (Page 3)

Compact Flash Core............................................................................................ 4-1
Core Overview..............................................................................................................................................4-1
Functional Description............................................................................................................................... 4-1
Required Connections.................................................................................................................................4-2
Software Programming Model...................................................................................................................4-3
HAL System Library Support.........................................................................................................4-3
Software Files....................................................................................................................................4-3
Register Maps................................................................................................................................... 4-4
Document Revision History.......................................................................................................................4-5
Common Flash Interface Controller Core..........................................................5-1
........................................................................................................................................................................ 5-1
Core Overview..............................................................................................................................................5-1
Functional Description............................................................................................................................... 5-2
Configuration............................................................................................................................................... 5-2
Attributes Page................................................................................................................................. 5-2
Timing page...................................................................................................................................... 5-3
Software Programming Model...................................................................................................................5-3
HAL System Library Support.........................................................................................................5-4
Software Files....................................................................................................................................5-4
Document Revision History.......................................................................................................................5-4
EPCS Serial Flash Controller Core..................................................................... 6-1
Core Overview..............................................................................................................................................6-1
Functional Description............................................................................................................................... 6-2
Avalon-MM Slave Interface and Registers................................................................................... 6-3
Configuration..............................................................................................................................................6-4
Software Programming Model...................................................................................................................6-4
HAL System Library Support.........................................................................................................6-4
Software Files....................................................................................................................................6-5
Document Revision History.......................................................................................................................6-5
JTAG UART Core................................................................................................7-1
Core Overview..............................................................................................................................................7-1
Functional Description............................................................................................................................... 7-1
Avalon Slave Interface and Registers.............................................................................................7-2
Read and Write FIFOs.....................................................................................................................7-2
JTAG Interface................................................................................................................................. 7-2
Host-Target Connection.................................................................................................................7-2
Configuration............................................................................................................................................... 7-3
Configuration Page..........................................................................................................................7-3
Simulation Settings.......................................................................................................................... 7-4
Hardware Simulation Considerations.......................................................................................................7-5
Software Programming Model...................................................................................................................7-5
TOC-3
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