Altera Embedded Peripherals IP - Manual (Page 287)

Descrip‐
tion:
Enables interrupt preemption (nesting) if a higher priority
interrupt is asserted while a lower priority ISR is executing, and
that higher priority interrupt uses a different register set than the
interrupt currently being serviced.
When this setting is enabled (set to 1), the macro
ALTERA_VIC_
DRIVER_ISR_PREEMPTION_INTO_NEW_REGISTER_SET_ENABLED
is
defined in system.h and the Nios II
config.ANI
(automatic
nested interrupts) bit is asserted during system software initiali‐
zation.
Use this setting to limit interrupt preemption to higher priority
(RIL) interrupts that use a different register set than a lower
priority interrupt that might be executing. This setting allows
you to support some preemption while maintaining the lowest
possible interrupt response time. However, this setting does not
allow an interrupt at a higher priority (RIL) to preempt a lower
priority interrupt if the higher priority interrupt is assigned to
the same register set as the lower priority interrupt.
Occurs: Once per VIC
altera_vic_driver.enable_preemption_rs_<n>
Identifier: ALTERA_VIC_DRIVER_ENABLE_PREEMPTION_RS_<n>
Type:
Boolean
Default
value:
0
Destina‐
tion file:
system.h
28-18 altera_vic_driver.enable_preemption_rs_<n>
UG-01085
2014.24.07
Altera Corporation Vectored Interrupt Controller Core
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