Altera Embedded Peripherals IP - Manual (Page 221)

The following paragraphs describe the behavior of the component interfaces.
Descriptor Slave Port
The descriptor slave port is write only and configurable to either 128 or 256 bits wide. The width is
dependent on the descriptor format you choose to use in your system. It is important to note that when
writing descriptors to this port, you must set the last bit high for the descriptor to be completely written to
the dispatcher module. You can access the byte lanes of this port in any order as long as the last bit is
written to during the last write access.
CSR Slave Port
The control and status register port is read/write accessible and is 32 bits wide. When the dispatcher
response port is disabled or set to memory-mapped mode then the CSR port is responsible for sending
interrupts to the host.
Response Port
The response port can be set to disabled, memory-mapped, or streaming. In memory-mapped mode the
response information is communicated to the host via an Avalon-MM slave port. The response informa‐
tion is wider than the slave port so the host must perform two read operations to retrieve all the informa‐
tion.
Note: Reading from the last byte of the response slave port performs a destructive read of the response
buffer in the dispatcher module. As a result always make sure that your software reads from the last
response address last.
When the response port is configured an Avalon Streaming source interface, you should connect it to a
module capable of pre-fetching descriptors from memory. Following table shows the Avalon-ST port
content.
Component Parameters
Parameter Name Description Allowable Range
DMA Mode Transfer mode of mSGDMA. This
parameter determines sub-cores
instantiation to construct the mSGDMA
structure.
Memory-Mapped to Memory-
Mapped, Memory-Mapped to
Streaming, Streaming to
Memory-Mapped
Data Width Data path width. This parameter affects
both read master and write master data
widths.
8, 16, 32, 64, 128, 256, 512, 1024
Data Path FIFO Depth Depth of internal data path FIFO. 16, 32, 64, 128, 256, 512, 1024,
2048, 4096
Descriptor FIFO Depth FIFO size to store descriptor count. 8, 16, 32, 64, 128, 256, 512, 1024
Response Port Option to enable response port and its port
interface type
Memory-Mapped, Streaming,
Disabled
UG-01085
2014.24.07
Descriptor Slave Port 22-5
Altera Modular Scatter-Gather DMA Altera Corporation
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