Flip-flop and four gates, Figure, Scc/escc user manual – Zilog Z80230 User Manual

Page 84

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SCC/ESCC

User Manual

UM010903-0515

SCC/ESCC Ancillary Support Circuitry

77

Figure

on page 75, the transmitter defines bit cell boundaries by one edge in all cases and uses the

other edge in FM1 and FM0 to create the mid-bit transition.

Manchester Encoding Circuit

1

3

2

Manchester

NRZ

Transmit Clock

1

2

3

4

5

a

b

5

4

Transmit

Clock

NRZ

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