Zilog Z80230 - Manual (Page 91)

SCC/ESCC
User Manual
UM010903-0515 SCC/ESCC Ancillary Support Circuitry
84
Ordinarily, the /TRxC pin is an input, but it can become an output if this pin has not been selected
as the source for the transmitter or the receiver, and bit D2 of WR11 is set to 1. The selection of the
signal provided on the /TRxC output pin is controlled by bits D1 and D0 of WR11. The /TRxC pin
is programmed to provide the output of the crystal oscillator, the output of the baud rate generator,
the receive output of the DPLL or the actual transmit clock. If the output of the crystal oscillator is
selected, but the crystal oscillator has not been enabled, the /TRxC pin is driven High. The option
of placing the transmit clock signal on the /TRxC pin when it is an output allows access to the
transmit output of the DPLL.
Figure on page 85 displays a simplified schematic diagram of the circuitry used in the clock mul-
tiplexing. It shows the inputs to the multiplexer section, as well as the various signal inversions
that occur in the paths to the outputs.
Selection of the clocking options may be done anywhere in the initialization sequence, but the
final values must be selected before the receiver, transmitter, baud rate generator, or DPLL are
enabled to prevent problems from arbitrarily narrow clock signals out of the multiplexers. The
same is true of the crystal oscillator, in that the output should be allowed to stabilize before it is
used as a clock source.
Also shown are the edges used by the receiver, transmitter, baud rate generator and DPLL to sam-
ple or send data or otherwise change state. For example, the receiver samples data on the falling
edge, but since there is an inversion in the clock path between the /RTxC pin and the receiver, a
rising edge of the /RTxC pin samples the data for the receiver.
The following shows three examples for selecting different clocking options. Figure on page 85
displays the clock set up for asynchronous transmission, 16x clock mode using the on-chip oscilla-
tor with an external crystal. This example uses the oscillator as the input to the baud rate generator,
although it can be used directly as the transmit or receive clock source. The registers involved are
WR11 through WR14 and the figure shows the programming in these registers.
An example of asynchronous communication where a 1x clock is obtained from an external
MODEM is displayed in Figure on page 86. The data encoding is NRZ. Note that:
1. The BRG is not used under this configuration.
2. The x1 mode in Asynchronous mode is a combination of both synchronous and asyn-
chronous transmission. The data is clocked by a common timing base, but characters
are still framed with Start and Stop bits. Because the receiver waits for one clock
period after detecting the first High-to-Low transition before beginning to assemble
characters, the data and clock is synchronized externally. The x1 mode is the only
mode in which a data encoding method other than NRZ is used.