Zilog Z80230 - Manual (Page 95)

SCC/ESCC
User Manual
UM010903-0515 Data Communication Modes
88
Data Communication Modes
Introduction
The SCC provides two independent, full-duplex channels programmable for use in any common
asynchronous or synchronous data communication protocol. The data communication protocols
handled by the SCC are:
• Asynchronous mode:
– Asynchronous (x16, x32, or x64 clock)
– Isochronous (x1 clock)
• Character-Oriented mode:
– Monosynchronous
– Bisynchronous
– External Synchronous
• Bit-Oriented mode
– SDLC/HDLC
– SDLC/HDLC Loop
Transmit Data Path Description
A diagram of the transmit data path is displayed in Figure on page 89. The transmitter has a Trans-
mit Data buffer (a 4-byte deep FIFO on the ESCC, a one byte deep buffer on the NMOS/CMOS
version) which is addressed through WR8. It is not necessary to enable the transmit buffer. It is
available in all modes of operation. The Transmit Shift register is loaded from either WR6, WR7,
or the Transmit Data buffer. In Synchronous modes, WR6 and WR7 are programmed with the
sync characters. In Monosync mode, an 8-bit or 6-bit sync character is used (WR6), whereas a 16-
bit sync character is used in the Bisynchronous mode (WR6 and WR7). In bit-oriented Synchro-