Altera IP Compiler for PCI Express - Manual (Page 28)

2–12 Chapter 2: Getting Started
Simulating the Design
IP Compiler for PCI Express User Guide August 2014 Altera Corporation
The Stratix IV .zip file includes files for Gen1 and Gen2 ×1, ×4, and ×8 variants. The
example in this document demonstrates the Gen2 ×8 variant. After you download
and unzip this .zip file, you can copy the files for this variant to your project directory,
<working_dir>. The files for the example in this document are included in the
hip_s4gx_gen2x8_128
directory. The Quartus II project file, top.qsf, is contained in
<working_dir>. You can use this project file as a reference for the .qsf file for your own
design.
Simulating the Design
As Figure 2–5 illustrates, the scripts to run the simulation files are located in the
<working_dir>\top_examples\chaining_dma\testbench directory. Follow these
steps to run the chaining DMA testbench.
1. Start your simulation tool. This example uses the ModelSim ® software.
1
The endpoint chaining DMA design example DMA controller requires the
use of BAR2 or BAR3.
2. In the testbench directory,
<working_dir>\top_examples\chaining_dma\testbench, type the following
command:
do runtb.do
r
This script compiles the testbench for simulation and runs the chaining DMA
tests.
Example 2–1 shows the partial transcript from a successful simulation. As this
transcript illustrates, the simulation includes the following stages:
■ Link training
■ Configuration
■ DMA reads and writes