Double divide (ddv), Updates to arithmetic status bits, Entering the instruction – Rockwell Automation 1761-HHP-B30 MicroLogix 1000 with Hand-Held Programmer (HHP) User Manual

Page 176: Changes to the math register

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Chapter 10
Using Math Instructions

10–10

The 32-bit content of the math register is divided by the 16-bit source value
and the rounded quotient is placed in the destination. If the remainder is 0.5
or greater, the destination is rounded up.

The source can either be a word address or a constant. The destination must
be a word address.

This instruction typically follows a MUL instruction that creates a 32-bit
result.

Updates to Arithmetic Status Bits

With this Bit:

The Controller:

S0/0

Carry (C)

always resets.

S0/1

Overflow (V)

sets if division by zero or if result is greater than 32,767 or
less than –32,768; otherwise resets. On overflow, the
minor error flag is also set. The value 32,767 is placed in
the destination.

S0/2

Zero (Z)

sets if result is zero; otherwise resets.

S0/3

Sign (S)

sets if result is negative; otherwise resets; undefined if
overflow is set.

Entering the Instruction

You enter the instruction from within the program monitor functional area.

P 0 0 0

D D V

S R C

N 2

1 0 0 0

P 0 0 0

D D V

D E S T

N 5

0

Changes to the Math Register

Upon instruction execution, the unrounded quotient is placed in the most
significant word of the math register. The remainder is placed in the least
significant word of the math register.

DDV

DOUBLE DIVIDE
Source

N7:2
1000

Dest

N7:5

0

Execution Times (

µ

sec) when:

True

False

157.06

6.78

Ladder representation:

Double Divide (DDV)

4

8

FUN

ENT

To enter the function code, press:

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