Lenze ECSCAxxx - Manual (Page 331)

System modules
DFIN_IO_DigitalFrequency (node number 21)
Inputs_DFIN
13
l
331 EDBCSXA064 EN 3.2
13.16 DFIN_IO_DigitalFrequency (node number 21)
13.16.1 Inputs_DFIN
This SB can convert a power pulse current at the master frequency input X8 into a speed
value and scale it. A master frequency can be transferred with high precision without any
offset and gain errors.
ƒ The master frequency input X8 is designed for signals with TTL level.
ƒ The input of a zero track is optional.
ƒ A configuration of the master frequency input X8 as output (
¶ 338) is possible via
C0491.
ƒ An encoder can be selected and configured via the codes:
– C0419 (encoder selection)
– C0420 (encoder increments)
– C0421 (encoder bias)
– C0427 (type of master frequency input signal)
(
Stop!
The connection X8 cannot be used as a master frequency input if incremental
encoders/SinCos encoders are used and X8 is configured as a master frequency
output.
DFIN_IO_DigitalFrequency
C0426
1
0
C0491
CTRL
C0421 C0427 C0420
C0419
X8
DI1
X6
1
0
0 TP/MP
-Ctrl
C0428 C0429
C0431
DFIN_nIn_v
DFIN_bTPReceived_b
DFIN_dnIncLastScan_p
ECSXA231
Fig. 13−22 System block "DFIN_IO_DigitalFrequency"
)
Note!
The process image is newly created for every task the SB is used in.
ƒ If therefore DFIN_nIn_v is used in several tasks, an individual process image
of the SB is created for each of these tasks.
ƒ This process is different from the previous process image principle!