Intel PXA26X - Manual (Page 172)

5-14 Intel® PXA26x Processor Family Developer’s Manual
Direct Memory Access Controller
5.2.3 Servicing Companion Chips and External Peripherals
Companion chips and external peripherals can be serviced with flow-through transfers. The
DMAC provides DMA Request to Channel Map Registers (DRCMRx) that contain four bits that
assign a channel number for each of the possible DMA requests. The companion-chip requests are
STUART
receive 0x40700000 1 01 8, 16, 32 Source 0x4000 014c
transmit 0x40700000 1 01
8, 16, 32, or
trailing
Target 0x4000 0150
MMC
receive 0x41100040 1 01 32 or trailing Source 0x4000 0154
transmit 0x41100044 1 01 32 or trailing Target 0x4000 0158
USB
endpoint 1
transmit
0x40600100 1 01 32 Target 0x4000 0164
endpoint 2
receive
0x40600180 1 01 32 Source 0x4000 0168
endpoint 3
transmit
0x40600200 1 01 32 Target 0x4000 016C
endpoint 4
receive
0x40600400 1 01 32 Source 0x4000 0170
endpoint 6
transmit
0x40600600 1 01 32 Target 0x4000 0178
endpoint 7
receive
0x40600680 1 01 32 Source 0x4000 017C
endpoint 8
transmit
0x40600700 1 01 32 Target 0x4000 0180
endpoint 9
receive
0x40600900 1 01 32 Source 0x4000 0184
endpoint 11
transmit
0x40600B00 1 01 32 Target 0x4000 018C
endpoint 12
receive
0x40600B80 1 01 32 Source 0x4000 0190
endpoint 13
transmit
0x40600C00 1 01 32 Target 0x4000 0194
endpoint 14
receive
0x40600E00 1 01 32 Source 0x4000 0198
Network SSP
receive 0x41400010 4 11 8, 16, 32 Source 0x4000 013C
transmit 0x41400010 4 11
8, 16, 32 or
trailing
Target 0x4000 0140
Audio SSP
receive 0x41500010 4 11 8, 16, 32 Source 0x4000 015C
transmit 0x41500010 4 11
8, 16, 32 or
trailing
Target 0x4000 0160
Hardware
UART
receive 0x41600000 1 01 8, 16, 32 Source 0x4000 0174
transmit 0x41600000 1 01
8, 16, 32 or
trailing
Target 0x4000 0188
Table 5-5. DMA Quick Reference for Internal Peripherals (Sheet 2 of 2)
Unit Function FIFO Address
Width
(bytes)
DCMD.
Width
(binary)
Burst Size
(bytes)
Source
or
Target
DRCMR