Intel PXA26X - Manual (Page 591)

Intel® PXA26x Processor Family Developer’s Manual 17-7
Hardware UART
Note: When DMA requests are enabled and an interrupt occurs, software must first read the LSR to see if
an error interrupt exists, then check the IIR for the source of the interrupt. If an interrupt occurs and
LSR[FIFOE] is clear, software must read the ISR to determine the error condition. When the last
error byte is read from the FIFO, DMA requests are automatically enabled. Software is not
required to check for the error interrupt if DMA requests are disabled because an error interrupt
only occurs when DMA requests are enabled.
If an error occurs while in DMA mode:
• the receive-DMA requests are disabled
• the error interrupt IIR[IID] is generated.
The processor must now read out the error bytes through programmed I/O (PIO). When all errors
have been removed from the FIFO, the receive DMA requests are once again enabled
automatically by the UART.
If an error occurs when the receive FIFO trigger threshold has been reached such that a receive
DMA request is set, users need to wait for the DMA to finish the transfer before reading out the
error bytes through PIO. If not, FIFO underflow could occur.
Note: Ensure that the DMA controller has completed the previous receive DMA requests before the error
interrupt handler begins to clear the errors from the FIFO. If not, FIFO underflow could occur.
17.4.2.6 Removing Trailing Bytes In DMA Mode
When the number of entries in the receive FIFO is less than its trigger threshold, and no additional
data is received, the remaining bytes are called trailing bytes. The remaining bytes must then be
removed via the processor as described in
Section 17.4.2.1, “FIFO Interrupt Mode Operation” .
17.4.3 Autoflow Control
Autoflow Control uses the Clear-to-Send (nCTS) and Request-to-Send (nRTS) signals to
automatically control the flow of data between the UART and external modem. When autoflow is
enabled, the remote device is not allowed to send data unless the UART asserts nRTS low. If the
UART deasserts nRTS while the remote device is sending data, the remote device is allowed to
send one additional byte after nRTS is deasserted. An overflow could occur if the remote device
violates this rule. Likewise, the UART is not allowed to transmit data unless the remote device
asserts nCTS low. This feature increases system efficiency and eliminates the possibility of a
receive FIFO overflow error due to long Interrupt latency.
Autoflow mode can be used in two ways: full autoflow, automating both nCTS and nRTS; and half
autoflow, automating only nCTS. Full autoflow is enabled by setting MCR[AFE] and MCR[RTS]
to 1. Auto-nCTS-Only mode is enabled by setting MCR[AFE] and clearing MCR[RTS].
When in full autoflow mode, nRTS is asserted when the UART FIFO is ready to receive data from
the remote transmitter. This occurs when the amount of data in the receive FIFO is below the
programmable trigger threshold value. When the amount of data in the receive FIFO reaches the
programmable trigger threshold, nRTS is deasserted. It will be asserted once again when enough
bytes are removed from the FIFO to lower the data level below the trigger threshold.