Intel PXA26X - Manual (Page 191)

Intel® PXA26x Processor Family Developer’s Manual 6-1
Memory Controller
6
This chapter describes the external memory interface structures and memory-related registers
supported by the Intel® PXA26x Processor Family.
The PXA26x processor family adds support for the extended mode register used in low-power
SDRAM. It also adds support for 8 bit read transactions from PCMCIA and static memory.
6.1 Overview
The processor external memory bus interface supports synchronous dynamic memory (SDRAM),
synchronous and asynchronous burst modes, page-mode flash, synchronous mask ROM
(SMROM), page mode ROM, SRAM, SRAM-like variable latency I/O (VLIO), 16-bit PC Card
expansion memory, and compact flash. Memory types can be programmed through the Memory
Interface Configuration registers.
Figure 6-1 is a block diagram of the maximum configuration of
the memory controller.