Intel PXA26X - Manual (Page 335)

Intel® PXA26x Processor Family Developer’s Manual 8-17
Synchronous Serial Port Controller
8.7.4.1 Transmit FIFO Not Full Flag (TNF) (read-only, non-interruptible)
The Transmit FIFO Not Full Flag (TNF) is a read-only bit that is set whenever the transmit FIFO is
not full. TNF is cleared when the FIFO is completely full. This bit can be polled when using
programmed I/O to fill the transmit FIFO over its threshold level. This bit does not request an
interrupt.
Table 8-6. SSP Status Register (SSSR) Bitmap and Bit Definitions
0x4100 0008 SSP Status Register (SSSR)
Bit
3
1 3
0 2
9 2
8 2
7 2
6 2
5 2
4 2
3 2
2 2
1 2
0 1
9 1
8 1
7 1
6 1
5 1
4 1
3 1
2 1
1 1
0
9 8 7 6 5 4 3 2 1 0
Reserved
RF
L
TF
L
RO
R
RF
S
TF
S
BS
Y
RN
E
TN
F
R
eser
ved
Rese
t
X 0xF 0x0 0 0 0 0 0 1 0
Bits Name Description
1:0 — Reserved
2 TNF
TRANSMIT FIFO NOT FULL (read only):
0 – Transmit FIFO is full
1 – Transmit FIFO is not full
3 RNE
RECEIVE FIFO NOT EMPTY (read only):
0 – Receive FIFO is empty
1 – Receive FIFO is not empty
4 BSY
SSP BUSY (read only):
Software must wait for the Tx Fifo to empty first and then wait for the BSY bit to be cleared
at the end of a data transfer.
0 – SSP is idle or disabled
1 – SSP currently transmitting or receiving a frame
5 TFS
TRANSMIT FIFO SERVICE REQUEST (read only):
0 – Transmit FIFO level exceeds TFT threshold, or SSP disabled
1 – Transmit FIFO level is at or below TFT threshold, generate interrupt or DMA request
6 RFS
RECEIVE FIFO SERVICE REQUEST (read only):
0 – Receive FIFO level exceeds RFT threshold, or SSP disabled
1 – Receive FIFO level is at or above RFT threshold, generate interrupt or DMA request
7 ROR
RECEIVE FIFO OVERRUN (read/write):
0 – Receive FIFO has not experienced an overrun
1 – Attempted data write to full receive FIFO, request interrupt
11:8 TFL
TRANSMIT FIFO LEVEL (read only):
Number of entries in transmit FIFO. Note: When the value 0x0 is read, the FIFO is either
empty or full and the software must refer to the TNF bit.
15:12 RFL
RECEIVE FIFO LEVEL (read only):
Number of entries minus one in receive FIFO. Note: When the value 0xF is read, the FIFO
is either empty or full and the software must refer to the RNE bit.
31:16 — Reserved