Intel PXA26X - Manual (Page 395)

Intel® PXA26x Processor Family Developer’s Manual 11-1
Fast Infrared Communication Port
11
The Fast Infrared Communications Port (FICP) for the Intel® PXA26x Processor Family operates
at half-duplex and provides direct connection to commercially available Infrared Data Association
(IrDA) compliant LED transceivers. The FICP is based on the 4-Mbps IrDA standard and uses
four-position pulse modulation (4PPM) and a specialized serial packet protocol developed for
IrDA transmission. To support the standard, the FICP has:
• A bit encoder/decoder
• A serial-to-parallel data engine
• A transmit FIFO 128 entries deep and 8-bits wide
• A receive FIFO 128 entries deep and 11-bits wide
The FICP shares general purpose input/output (GPIO) pins for transmit and receive data with the
standard UART. Only one of the ports can be used at a time. To support a variety of IrDA
transceivers, both the transmit and receive data pins can be individually configured to
communicate using normal or active low data.
11.1 Signal Description
The FICP signals are IRRXD and IRTXD. Table 11-1 describes each signal’s function. Most IrDA
transceivers also have enable and speed pins. Use GPIOs to enable the transceiver and select the
speed. See
Section 4, “System Integration Unit” on page 4-1 for more information.
11.2 Fast Infrared Communications Port Operation
The FICP is disabled and does not have control of the port’s pins after a reset. Before software
enables the FICP for high-speed operation, it must set the control registers to reflect the desired
operating mode. After the control registers are set, software can either preload the FICP’s transmit
FIFO with up to 128 bytes, or leave the FIFO empty and use the DMA to service it after the FICP
is enabled. Once the FICP is enabled, transmit/receive data can be sent on the transmit and receive
pins.
The transmit/receive data is modulated according to the 4PPM IrDA standard and converted to
serial or parallel data. The modulation technique and the frame format are discussed in the
following sections.
Table 11-1. FICP Signal Description
Signal Name Input/Output Description
IRRXD Input Receive pin for FICP
IRTXD Output Transmit pin for FICP