Intel PXA26X - Manual (Page 185)

Intel® PXA26x Processor Family Developer’s Manual 5-27
Direct Memory Access Controller
7. Program the channel’s DDADR with the descriptor created in Step 5.
8. Set the DCSR[RUN] to a 1.
Example 5-4. How to initialize a channel that is going to be used by a direct DMA master:
The most efficient way to move data between an I/O device and main memory is the processor’s
descriptor-based DMA system. Each application has different requirements, so a descriptor-based
DMA may be best for some applications while a non-descriptor-based DMA is best for others. For
applications that can not tolerate the time needed to fetch a descriptor before each DMA transfer,
choose the non descriptor-based DMA method. For applications that can tolerate it, a descriptor-
based DMA method can reduce the amount of core intervention.
Self–Modifying Descriptors: The descriptor-based DMA system can be used to provide true direct
memory access to devices that require it.
In this example, a companion chip has the following requirements:
1. When the companion chip asserts DREQ from 0 to 1, the DMA must fetch four words of the
descriptor from one of the chip’s ports.
2. Based on the information contained in the four descriptor words, the DMA must transfer data
from the source address to the destination address without waiting for another request from the
companion chip.
3. After it transfers the number of bytes in DCMD:LENGTH, the DMA returns to Step 1.
An external device with these requirements can use a constant descriptor in memory.
struct {long ddadr;
long dsadr;
long dtadr;
short length;
short dcmd;
} desc[2];
desc[0].ddadr = &desc[1];
desc[0].dsadr = I_ADR + I_DESC_OFFS;
desc[0].dtadr = &desc[1].dsadr;
desc[0].length = 8;
desc[0].dcmd = CMD_IncTrgAdr | CMD_FlowThru;
desc[1].ddadr = &desc[0];
desc[1].dtadr = I_ADR + I_DATA_OFFS;
desc[1].dsadr = 0;
desc[1].length = 0;
desc[1].dcmd = 0;
When the external device has data to transfer, it makes a DMA request in the standard way. The
DMAC wakes up and reads four words from the device’s I_DESC_OFFS address (the DMAC only
transfers four words because the first descriptor has an 8-byte count.). The four words from the
external device are written in the DSADR, DTADR, and DCMD fields of the next descriptor. The
DMAC then steps into the next (dynamically modified) descriptor and, using the I_DATA_OFFS
address on the external device, starts the transfer that the external device requested. When the
transfer is finished, the DMAC steps back into the first descriptor and the process is repeated.
This example lends itself to any number of variations. For example, a DMA channel that is
programmed in this way can be used to transfer messages from a network device directly into client
buffers. Each block of data would be preceded by its final destination address and a count.