Example 5-1. how to set up and start a channel, Write a 0 to dcsr[run – Intel PXA26X User Manual
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Intel® PXA26x Processor Family Developer’s Manual
Direct Memory Access Controller
Example 5-1. How to set up and start a channel:
The following example shows how to set up a channel to transfer LENGTH words from the
address DSADR to the I/O address DTADR. The example also shows how to start the transfer. The
example sets the stop bit in the DDADR, so the DMA channel stops after it completely transfers
LENGTH bytes of data.
// build real descriptor
desc[0].ddadr = STOP;
desc[0].dsadr = DSADR;
desc[0].dtadr = DTADR;
desc[0].dcmd = DCMD;
// start the channel
DMANEXT[CHAN] = &desc[0];
DRUN = 1;
Example 5-2. How to initialize a descriptor list for a channel that is running:
// Allocate a new descriptor, and make it an end
// descriptor whose “ddadr” field points back at itself
newDesc = New_Desc();
newDesc->ddadr = newDesc | STOP;
// make it a zero length descriptor
newDesc->dcmd = ZERO;
// Start the channel
DMANEXT[CHAN] = newDesc;
DRUN = 1;
The channel starts, loads the descriptor in its registers, and stops because the transfer length is 0
and the STOP bit is set. No data is transferred in this example. The channel can be restarted by
writing to its DDADR and writing a 1 to the DCSR[RUN] bit.
Example 5-3. How to add a descriptor to the end of a descriptor list for a channel that is
running:
The example in this section assumes that the Descriptor Fetch Mode is active.
DMA descriptor lists are used as queues of full buffers for network transmitters and as queues of
empty buffers for network receivers. Because the buffers in a queue are often small (in particular,
as small as an ATM cell), on-the-fly DMA descriptor lists manipulation must be efficient.
1. Write a 0 to DCSR[RUN].
2. Wait until the channel stops. The channel stop state is reflected in the DCSR:STOPSTATE bit.
3. In memory, create the descriptor to be added and set its stop bit to a 1.
4. In the memory, manipulate the DDADR of the current chain’s last descriptor such that its
DDADR points to the descriptor created in Step
5. In the memory, create a new descriptor that has the same DDADR, DSADR, DTADR, and
CMD as those of the stopped DMA channel. The new descriptor is the next descriptor for the
list.
6. Examine the DMA channel registers and determine if the channel stopped in the chain’s last
descriptor of the chain. If it did, manipulate the DDADR of the last descriptor in the memory
so that its DDADR points to the descriptor created in Step