Intel PXA26X - Manual (Page 392)

10-26 Intel® PXA26x Processor Family Developer’s Manual
Universal Asynchronous Receiver/Transmitter
Note: The SIR TXD output pin is automatically held deasserted when the RCVEIR bit is set. Before
setting the RCVEIR bit, check that the TEMT bit is 1. While receiving, any data placed in the
transmit FIFO will not be held. Only add data to the transmit FIFO while not receiving. To start
transmission, the RCVEIR bit must be cleared.
To disable SIR, disable the IrDA LED first, if possible. Second, set the TXD GPIO pin to the
infrared LED's default state using the GPCR/GPSR registers. Next, change the TXD pin from
alternate function to GPIO mode. Now the SIR can be disabled without causing spurious transmit
pulses.
10.5 Register Summary
Table 10-18 , Table 10-19 , and Table 10-20 contain the register addresses for the FFUART,
BTUART, and STUART.
Table 10-18. FFUART Register Addresses
Register
Addresses
DLAB Bit
Value
Name Description
0x4010 0000 0 FFRBR “Receive Buffer Register (RBR)” (read only)
0x4010 0000 0 FFTHR “Transmit Holding Register (THR)” (write only)
0x4010 0004 0 FFIER “Interrupt Enable Register (IER)” (read/write)
0x4010 0008 X FFIIR “Interrupt Identification Register (IIR)” (read only)
0x4010 0008 X FFFCR “FIFO Control Register (FCR)” (write only)
0x4010 000C X FFLCR “Line Control Register (LCR)” (read/write)
0x4010 0010 X FFMCR “Modem Control Register (MCR)” (read/write)
0x4010 0014 X FFLSR “Line Status Register (LSR)” (read only)
0x4010 0018 X FFMSR “Modem Status Register (MSR)” (read only)
0x4010 001C X FFSPR “Scratchpad Register (SPR)” (read/write)
0x4010 0020 X FFISR “Infrared Selection Register (ISR)” (read/write)
0x4010 0000 1 FFDLL
“Divisor Latch Registers (DLL and DLH)” low byte
(read/write)
0x4010 0004 1 FFDLH
“Divisor Latch Registers (DLL and DLH)” high byte
(read/write)
Table 10-19. BTUART Register Locations
Register
Addresses
DLAB Bit
Value
Name Description
0x4020 0000 0 BTRBR “Receive Buffer Register (RBR)” (read only)
0x4020 0000 0 BTTHR “Transmit Holding Register (THR)” (write only)
0x4020 0004 0 BTIER “Interrupt Enable Register (IER)” (read/write)
0x4020 0008 X BTIIR “Interrupt Identification Register (IIR)” (read only)
0x4020 0008 X BTFCR “FIFO Control Register (FCR)” (write only)
0x4020 000C X BTLCR “Line Control Register (LCR)” (read/write)