Figure 7-1. lcd controller block diagram – Intel PXA26X User Manual

Page 271

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Intel® PXA26x Processor Family Developer’s Manual

7-3

Liquid Crystal Display Controller

Figure 7-1. LCD Controller Block Diagram

LCD DMA Controller

Registers

Palette RAM

Output FIFOs

Serializer

To Pins

From Clock

Module

LCDClk

Pixel Data

Register Data

Input FIFOs

TMED
Dithering
Engine

L_DD[15:0]

System Bus

Control

signals

Configuration

Encoded

pixel data

Raw pixel
data

Raw pixel
data

Raw
pixel
data

Raw
pixel data

Dithered
pixels

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