Intel PXA26X - Manual (Page 415)

Intel® PXA26x Processor Family Developer’s Manual 12-5
Universal Serial Bus Device Controller
The PID is 1 byte wide and always follows the sync field. The first four bits contain an encoded
value that represents packet type (token, data, handshake, and special), packet format, and type of
error detection. The last four bits contain a check field that ensures the PID is transmitted without
errors. The check field is generated by performing a ones complement of the PID. The UDC XORs
the PID and CRC fields and takes the action prescribed in the USB standard if the result does not
contain all ones, which indicates an error has occurred in transmission.
Use the address and endpoint fields to access the UDC’s 16 endpoints. The address field contains
seven bits and permits 127 unique devices to be placed on the USB. After the USB host signals a
reset, the UDC and all other devices are assigned the default address, zero. The host is then
responsible for assigning a unique address to each device on the bus. Addresses are assigned in the
enumeration process, one device at a time. After the host assigns the an address to the UDC, the
UDC only responds to transactions directed to that address. The address field follows the PID in
every packet transmitted.
When the UDC detects a packet that is addressed to it, it uses the endpoint field to determine which
of the UDC’s endpoints is being addressed. The endpoint field contains four bits. Encodings for
endpoints 0 (0000b) through 15 (1111b) are allowed. The endpoint field follows the address field.
The frame number is an 11-bit field incremented by the host each time a frame is transmitted.
When it reaches its maximum value, 2047 (0x7FF), its value rolls over. Frame number is
transmitted in the SOF packet, which the host outputs in 1 ms intervals. Device controllers use the
frame number field to control isochronous transfers. Data fields transmit the packet data between
the host and the UDC. A data field consists of 0 to 1023 bytes. Each byte is transmitted least
significant bit first. The UDC generates an interrupt to indicate that a start-of-frame event has
occurred.
CRC fields detect errors introduced during token and data packet transmission, and are applied to
all the fields in the packet except the PID field. The PID contains its own 4-bit ones complement
check field for error detection. Token packets use a 5-bit CRC (x
5
+x
2
+1) called CRC5 and data
packets use a 16-bit CRC (x
16
+x
15
+x
2
+1) called CRC16. For both CRCs, the checker resets to all
ones at the start of each packet.
12.3.4 Packet Formats
USB supports four packet types: token, data, handshake, and special. A PRE (preamble) PID
precedes a low-speed (1.5 Mbps) USB transmission. The UDC supports high-speed (12 Mbps)
USB transfers only. PRE packets that signify low-speed devices and the low-speed data transfer
that follows such PRE packets are ignored.
12.3.4.1 Token Packet Type
A token packet is placed at the beginning of a frame and is used to identify OUT, IN, SOF, and
SETUP transactions. OUT and IN packets transfer data, SOF packets time isochronous
transactions, and SETUP packets are used for control transfers to configure endpoints. A token
packet consists of a sync, a PID, an address, an endpoint, and a CRC5 field (see
Table 12-3 ). For
OUT and SETUP transactions, use the address and endpoint fields to select the UDC endpoint that
receives the data. For an IN transaction, use the address and endpoint fields to select the UDC
endpoint that transmits data.