Intel PXA26X - Manual (Page 390)

10-24 Intel® PXA26x Processor Family Developer’s Manual
Universal Asynchronous Receiver/Transmitter
10.4.6.2 Operation
The SIR modulation technique works with 5-, 6-, 7-, or 8-bit characters with an optional parity bit.
The data is preceded by a zero value start bit and ends with one or more stop bits. The encoding
scheme is to set a pulse 3/16 of a bit wide in the middle of every zero bit and send no pulses for bits
that are ones. The pulse for each zero bit must occur, even for consecutive bits with no edge
between them.
Table 10-17. Infrared Selection Register – ISR
Base+0x20 Infrared Selection Register UART
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
eser
v
e
d
R
XPL
TX
PL
XM
O
D
E
RC
V
E
IR
XM
ITIR
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Read/Write
Bits Name Description
31:5 — Reserved
4 RXPL
RECEIVE DATA POLARITY:
0 – SIR decoder interprets positive pulses as zeroes
1 – SIR decoder interprets negative pulses as zeroes
3 TXPL
TRANSMIT DATA POLARITY:
0 – SIR encoder generates a positive pulse for a data bit of zero
1 – SIR encoder generates a negative pulse for a data bit of zero
2 XMODE
TRANSMIT PULSE WIDTH SELECT:
When XMODE is cleared, the UART 16X clock is used to clock the IrDA transmit and
receive logic. When XMODE is set, the transmit encoder generates 1.6
µ s pulses (that are
3/16 of a bit time at 115.2 Kbps) instead of pulses 3/16 of a bit time wide, and the receive
decoder expects pulses will be 1.6
µ s wide also.
0 – Transmit pulse width is 3/16 of a bit time wide
1 – Transmit pulse width is 1.6
µ
s
1 RCVEIR
RECEIVER SIR ENABLE:
When RCVEIR is set, the signal from the RXD pin is processed by the IrDA decoder before
it is fed to the UART. If RCVEIR is cleared, then all clocking to the IrDA decoder is blocked
and the RXD pin is fed directly to the UART.
0 – Receiver is in UART mode
1 – Receiver is in infrared mode
0 XMITIR
TRANSMITTER SIR ENABLE:
When XMITIR is set to a 1, the normal TXD output from the UART is processed by the IrDA
encoder before it is fed to the device pin. If XMITIR is cleared, all clocking to the IrDA
encoder is blocked and the UART’s TXD signal is connected directly to the device pin.
When Transmitter SIR Enable is set, the TXD output pin, which is in a normally high default
state, will switch to a normally low default state. This can cause a false start bit unless the
infrared LED is disabled before XMITIR is set.
0 – Transmitter is in UART mode
1 – Transmitter is in infrared mode