15 infrared selection register (isr), Table 17-19. isr bit definitions (sheet 1 of 2) – Intel PXA26X User Manual
Page 614
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Intel® PXA26x Processor Family Developer’s Manual
Hardware UART
17.5.15
Infrared Selection Register (ISR)
Each UART can manage an IrDA module associated with it. The Infrared Selection Register
controls IrDA functions (see
Section 17.4.5, “Slow Infrared Asynchronous Interface” on
). The ISR bit definitions are shown in
Table 17-19.
ISR
Bit Definitions (Sheet 1 of 2)
Physical Address
0x4160_0020
Infrared Selection Reg. (ISR)
PXA26x Processor Family Hardware
UART
User
Settings
Bit
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
Reserved
RX
PL
TX
PL
XM
O
D
E
RC
V
E
IR
XM
ITIR
Reset
?
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0
0
0
0
0
Bits
Access
Name
Description
31:5
N/A
—
Reserved – Read as unknown and must be written as zero.
4
R/W
RXPL
RECEIVE DATA POLARITY:
0 – SIR decoder takes positive pulses as zeros
1 – SIR decoder takes negative pulses as zeros
3
R/W
TXPL
TRANSMIT DATA POLARITY:
0 – SIR encoder generates a positive pulse for a data bit of zero
1 – SIR encoder generates a negative pulse for a data bit of zero