Motorola MPC8260 - Manual (Page 210)

6-8 MPC8260 PowerQUICC II UserÕs Manual MOTOROLA
Part III. The Hardware Interface
LWE[0Ð3]
LSDDQM[0Ð3]
LBS[0Ð3]
Local bus write enableÑThe write enable pins are outputs of the Local bus GPCM. These pins
select speciÞc byte lanes for write operations.
Local bus SDRAM DQMÑThe DQM pins are outputs of the SDRAM control machine. These pins
select speciÞc byte lanes of SDRAM devices.
Local bus UPM byte selectÑThe byte select pins are outputs of the UPM in the memory controller.
They are used to select speciÞc byte lanes during memory operations. The timing of these pins is
programmed in the UPM. The actual driven value depends on the address and size of the
transaction and the port size of the accessed device.
LSDA10
LGPL0
Local bus SDRAM A10. Output from the 60x bus SDRAM controller. Is part of the address when a
row address is driven and is part of the command when a column address is driven.
Local bus UPM general purpose line 0ÑThis is one of six general purpose output lines from UPM.
The values and timing of this pin is programmed in the UPM.
LSDWE
LGPL1
Local bus SDRAM write enableÑOutput from the local bus SDRAM controller. Should be
connected to SDRAMsÕ WE input.
Local bus UPM general purpose line 1ÑThis is one of six general purpose output lines from UPM.
The values and timing of this pin is programmed in the UPM.
LOE
LSDRAS
LGPL2
Local bus output enableÑThe output enable pin is an output of the Local bus GPCM. Controls the
output buffer of memory devices during read operations.
Local bus SDRAM rasÑOutput from the Local bus SDRAM controller. Should be connected to the
SDRAM RAS input.
Local bus UPM general purpose line 2ÑThis is one of six general purpose output lines from UPM.
The values and timing of this pin is programmed in the UPM.
LSDCAS
LGPL3
Local bus SDRAM CASÑOutput from the Local bus SDRAM controller. Should be connected to
SDRAMsÕ CAS input.
Local bus UPM general purpose line 3ÑThis is one of six general purpose output lines from UPM.
The values and timing of this pin is programmed in the UPM.
LGTA
LUPWAIT
LGPL4
LPBS
Local bus GPCM TAÑThis input pin is used for transaction termination during GPCM operation.
Requires external pull up resistor for proper operation.
Local bus UPM waitÑThis is an input to the UPM. An external device may hold this pin low to force
the UPM to wait until the device is ready for the continuation of the operation.
Local bus UPM general purpose line 4ÑThis is one of six general purpose output lines from UPM.
The values and timing of this pin is programmed in the UPM.
Local bus parity byte selectÑIn systems in which the data parity is stored in a separate chip, this
output is used as the byte select for that chip.
LGPL5 Local bus UPM general purpose line 5ÑThis is one of six general purpose output lines from UPM.
The values and timing of this pin is programmed in the UPM.
LWR Local writeÑThe local write pin is an output from the local bus memory controller. It is used to
distinguish between read and write transactions.
L_A14
PCI_PAR
Local bus address 14ÑLocal bus address bit 14 output pin. In the local address bus bit 14 is most
signiÞcant and bit 31 is least signiÞcant.
PCI parityÑPCI parity input/output pin. Assertion of this pin indicates that odd parity is driven
across PCI_AD[0Ð31] and PCI_C/BE[0Ð3] during address and data phases. Negation of PCI_PAR
indicates that even parity is driven across the PCI_AD[0Ð31] and PCI_C/BE[0Ð3] during address
and data phases.
Table 6-1. External Signals (Continued)
Signal Description