Motorola MPC8260 - Manual (Page 972)

35-16 MPC8260 PowerQUICC II UserÕs Manual MOTOROLA
Part IV. Communications Processor Module
PC10 FCC1: TxD[2]
UTOPIA 16
SCC3: CD
SCC3: RENA
Ethernet
GND SI1: L1ST4
strobe
FCC2: RxD[3] 1
UTOPIA
(secondary option)
GND
PC9 FCC1: TxD[1]
UTOPIA 16
SCC4: CTS
SCC4: CLSN
Ethernet
(primary option)
by PC3 SI2: L1ST1
strobe
TDM_A2: L1TSYNC/
GRANT 1
(secondary option)
GND
PC8 FCC1: TxD[0]
UTOPIA 16
SCC4: CD
SCC4: RENA
Ethernet
GND SI2: L1ST2
Strobe
SCC3: CTS 1
(secondary option)
GND
PC7 TDM_C1: L1RQ FCC1: CTS GND FCC1: TxAddr[2]
MPHY master,
multiplexed: polling
FCC1: TxAddr[2] 2
MPHY, slave,
multiplexed polling
FCC1: TxClav1 2
MPHY, master, direct
polling
FCC2: TxAddr[2]
MPHY, slave,
multiplexed polling
GND
PC6 TDM_C1: L1CLKO FCC1: CD GND FCC1: RxAddr[2]
MPHY, master,
multiplexed polling
FCC1: RxAddr[2] 2
MPHY, slave,
multiplexed polling)
FCC1: RxClav1 2
MPHY, master, direct
polling
FCC2: RxAddr[2]
MPHY, slave,
multiplexed polling
GND
PC5 FCC2: TxClav
UTOPIA, slave
FCC2: TxClav
UTOPIA, master
GND SI2: L1ST3
Strobe
FCC2: CTS GND
PC4 FCC2: RxEnb
UTOPIA, master
FCC2: RxEnb
UTOPIA, slave
GND SI2: L1ST4
Strobe
FCC2: CD GND
PC3 FCC2: TxD[2]
UTOPIA 8
FCC3: CTS GND IDMA2: DACK SCC4: CTS 1
(secondary option)
GND
PC2 FCC2: TxD[3]
UTOPIA 8
FCC3: CD GND IDMA2: DONE
Inout
V
DD
PC1 BRG6: BRGO IDMA2: DREQ GND TDM_A2: L1RQ
PC0 BRG7: BRGO IDMA1: DREQ GND TDM_A2: L1CLKO SMC2: SMSYN 1
(secondary option)
GND
1 Available only when the primary option for this function is not used.
2 MPHY Address pins 3,4 (master mode) can come from FCC2, depending on CMXUAR programming. (See
Section 15.4.1, ÒCMX UTOPIA Address Register (CMXUAR).Ó).
Table 35-7. Port C Dedicated Pin Assignment (PPARC = 1) (Continued)
PIN
Pin Function
PSORC = 0 PSORC = 1
PDIRC = 1 (Output) PDIRC = 0 (Input)
Default
Input
PDIRC = 1 (Output)
PDIRC = 0 (Input or
Inout if SpeciÞed)
Default
Input