Motorola MPC8260 - Manual (Page 310)

10-34 MPC8260 PowerQUICC II UserÕs Manual MOTOROLA
Part III. The Hardware Interface
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Figure 10-19. 128-Mbyte SDRAM (Eight-Bank Configuration, Banks 1 and 8 Shown)
CKE
CLK
DQM
ADDR[0Ð11]
DQ[0Ð7]
DATA[0Ð7] DATA[56Ð63]
DATA[0Ð7] DATA[56Ð63]
CS[0Ð7]
PSDRAS
PSDWE
PSDCAS
CS7
CS0
CS7
CS0
PSDDQM[0Ð7]
DQM0 DQM7 DQM1 DQM2 DQM3 DQM4 DQM5 DQM6
2x1M x8
SDRAM
x8
x8
x8
A[17]
D[0Ð63]
MPC8260
PSDA10
A[19Ð28]
x8
CAS
CS
RAS
WE
CKE
CLK
DQM
ADDR[0Ð11]
DQ[0Ð7]
2x1M x8
SDRAM
CAS
CS
RAS
WE
CKE
CLK
DQM
ADDR[0Ð11]
DQ[0Ð7]
2x1M x8
SDRAM
CAS
CS
RAS
WE
CKE
CLK
DQM
ADDR[0Ð11]
DQ[0Ð7]
2x1M x8
SDRAM
CAS
CS
RAS
WE
12-bit