Motorola MPC8260 - Manual (Page 338)

10-62 MPC8260 PowerQUICC II UserÕs Manual MOTOROLA
Part III. The Hardware Interface
10.5.4 Differences between MPC8xxÕs GPCM and MPC8260Õs GPCM
Users familiar with the MPC8xx GPCM should read this section Þrst:
¥ External terminationÑIn the MPC8xx the external termination connects to the
external bus TA and so must be asserted in sync with the system clock. In the
MPC8260, this signal is separated from the bus and named GTA. The signal is
synchronized internally and sampled. The sampled signal is used to generate TA,
which terminates the bus transaction.
¥ Extended hold time for reads can be up to 8 clock cycles (instead of 1 in the
MPC8xx).
10.6 User-Programmable Machines (UPMs)
Users familiar with MPC8xx memory controller should Þrst read Section 10.6.6,
ÒDifferences between MPC8xx UPM and MPC8260 UPM.Ó Table 10-33 lists the UPM
interface signals on the 60x and local bus.
Table 10-32. Boot Bank Field Values after Reset
Register Setting
BR0 BA From hard reset conÞguration word. See Section 5.4.1, ÒHard Reset ConÞguration Word.Ó
PS From hard reset conÞguration word. See Section 5.4.1, ÒHard Reset ConÞguration WordÓ
DECC 0
WP 0
MS[0Ð12] 000
EMEMC From hard reset conÞguration word. See Section 5.4.1, ÒHard Reset ConÞguration WordÓ
V 1
OR0 AM[0Ð16] 1111_1110_0000_0000_0 (32 MByte)
BCTLD 0
CSNT 1
ACS[0Ð1] 11
SCY[0Ð3] 1111
SETA 0
TRLX 1
EHTR 0
Table 10-33. UPM Interfaces Signals
60x Bus Local Bus Comments
CS[0Ð11] Device select
PBS[0Ð7] LBS[0Ð3] Byte Select
PGPL_0 LGPL_0 General-purpose line 0
PGPL_1 LGPL_1 General-purpose line 1
PGPL_2 LGPL_2 General-purpose line 2
PGPL_3 LGPL_3 General-purpose line 3
PGPL_4/UPWAIT LGPL_4/UPWAIT General-purpose line 4/UPM WAIT
PGPL_5 LGPL_5 General-purpose line 5